1. Field of the Invention
The present invention relates to an input-output (I/O) protective circuit for use in a liquid crystal display device, wherein an I/O primary stage thin film transistor is provided with an I/O protective function as an antistatic countermeasure against the surge current, the noise voltage and so forth.
2. Prior Art
In a liquid crystal display device (abbreviated as LCD hereinafter) including a prior art thin film transistor (abbreviated as TFT hereinafter) made of a polycrystalline silicon layer formed at a low temperature, the switching TFT set up at each pixel position, a driving circuit for the liquid crystal panel and the I/O protective circuit respectively include an n-channel lightly-doped-drain TFT (referred to as LDD MOS TFT hereinafter).
FIG. 5 is a circuit diagram showing an equivalent circuit of a prior art I/O protective circuit for LCD.
As shown in FIG. 5, the voltage supplied to opposing electrodes and others via an I/O terminal pad 41 is applied to this I/O protective circuit.
The I/O protective circuit includes an I/O protective TFT 42, an I/O resistance R1, and a resistance R2 connected between the gate G and the drain D of the I/O protective TFT 42. In the output portion of the I/O protective circuit, on one hand, there are provided an I/O primary stage TFT 43 and resistances R3, R4 and R5. The I/O protective TFT 42 and the I/O primary stage TFT 43 are a TFT having a LDD structure. The source S formed of the diffusion layer of the I/O protective TFT 42 is connected with a power source Vss. The I/O primary stage TFT 43 is a buffer giving the voltage (current) to the opposed electrodes of the liquid crystal panel, and the drain D of it is connected with the gate G via the resistance R3 as well as with the power source Vdd. The source S of the I/O primary stage TFT 43 is connected with the power source Vss via the resistance R4 as well as with the drain D of the I/O protective TFT 42 and further connected with an input circuit via the resistance R5.
The I/O protective TFT 42 and the I/O primary stage TFT 43 are not formed on a semiconductor substrate like silicon (Si) different from an ordinary semiconductor element. They are made of polycrystalline silicon and formed on a glass plate by mean of a photolithographic method. In case of the TFT for LCD, as the channel layer of the TFT is made of intrinsic semiconductor (non-doped Si), it is often seen that any potential to be referred to as a standard potential is not given to the substrate i.e. the channel layer.
However, as the circuit constitution as described above fails to make sure of a sufficient way of escape for the electric current having flowed into the I/O protective circuit, the electrostatic breakdown might be caused at the insulating film or the junction of the I/O protective TFT constituting the I/O protective circuit, thus it becoming hard for the I/O protective circuit to play its essential role. This is one problem to be solved.
The snapback phenomenon will now be explained with reference to FIGS. 6 and 7.
In the MOS TFT having a structure as shown in FIG. 6, a polycrystalline silicon layer 57 is formed on an insulating oxide film 51 and then, a gate insulating film 52 is further formed to cover the silicon film 57. Still further, the gate electrode 53 is formed on the gate insulating film 52. In the next, a predetermined impurity is doped in the polycrystalline silicon layer 57 by making use of the pattern of the gate electrode 53, thereby a drain region 54 and a source region 55 being formed and at the same time, a region between the above two regions 54 and 55 being formed as a channel region 56. In a TFT having the LDD structure like this, the source region 55 is connected with the power source Vss while the drain region 54 and the gate electrode 53 are commonly connected with each other such that a control voltage Vcnt is given to both of them.
In the next, it is studied how the current Ids flowing between the drain region 54 and the source region 55 changes in response to the change of the control voltage Vcnt which controls the voltage Vds applied between the drain region 54 and the source region 55. As a result, it is found that the relation between the voltage Vds and the current Ids changes along a solid line of a graph as shown in FIG. 7. As will be seen from the above graph, if the applied voltage Vds once exceeds the breakdown voltage (breakout voltage) BVds of the above MOS TFT, the current Ids abruptly begins to flow and can not decrease even though the applied voltage Vds is returned to the level lower than the breakdown voltage BVds. Moreover, the current Ids begins to rather increase at a still lower applied voltage Vds, that is, the secondary breakdown takes place. The phenomenon like this is called a snapback phenomenon.
In FIG. 7 showing the snapback characteristic of the MOS TFT, the voltage at a point P is called a hold voltage while the current at P is called a hold current. The snapback characteristic like this is called the bipolar action of the MOS TFT. If the impurity density difference between the drain and the substrate (i.e. channel) becomes large, the characteristic is shifted from that which is indicated by a solid line to that which is shown by a dotted line as shown in FIG. 7. In other words, the breakdown voltage BVds becomes lower and at the same time, the hold voltage becomes lower, too. The TFT of this type is herein called a non-LDD TFT.
The TFT having the high breakdown voltage BVds as well as the high hold voltage like the above-mentioned, might be most suitably used as a driving TFT for the liquid crystal display panel, but it is not suitable for using as the I/O protective TFT. On one hand, in case of the TFT as sued in LCD, as it is not possible to fix the standard potential of the substrate, the potential of the substrate can not be free from the influence of the fixed electric charge existing in the foundation film on the substrate side, the semiconductor layer, insulating gate film and so forth. Thus, the potential of the substrate is made unstable due to the above electrostatic charges, thereby the characteristic of the TFT being changed and becoming unstable. This is another problem to be solved in addition to the one as mentioned above.
As described above, however, as the prior art I/O protective circuit for LCD fails to provide a sufficient way of escape allowing the current having flowed into the I/O protective circuit to get out therefrom, it constitutes the switching element for driving each pixel of the liquid crystal panel or the I/O primary TFT by using the LDD TFT, but with regard to the I/O protective circuit, there has been not used the non-LDD TFT of which the breakdown voltage BVds and the hold voltage at the time of the snapback are lower than those of the LDD TFT, respectively.
Accordingly, the invention has been made in view of the above-mentioned problems and others and an object of the invention is to provide an I/O protective circuit for LCD having more stable I/O protective function.